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SoC Design Engineer with Full Chip Level,front Design Flow,bluetooth,w
Full time
Bengaluru/Bangalore
12,00,000 - 22,00,000 P.A
JOB DESCRIPTION:


Greetings!!

I would like to articulate about Job openings available with one of our Fortune 500 client.

Please find the job specifications below & send across your updated resume ASAP.
Candidates working in Product companies need apply.


Principal SoC Design Engineer IDC

Key Responsibilities:
Candidate will lead at least one aspect of the subsystems integration of a MIPS processor based SOC
Work with architecture and applications teams to ensure target specifications and customer requirements are achieved.
Work on implementing and defining the low power design.
Work on all aspects of the front design flow including synthesis, DFT and STA.
Perform HDL design, verification, and debug at both the unit and full-chip level
Validate and debug silicon products in support of release to production.
Participate in spec reviews, code reviews, coverage analysis, etc. in support of corporate ISO Quality Systems
Interface with applications, product and test engineering, marketing, development systems, technology development, CAD, layout and other design organizations


Requirements

Exposure to CPU sub-system integration.
Knowledgeable in Chip level Design and Integration activities.
Desirable to have prior experience in IPs Ethernet / WIFI/AUDIO/ VIDEO
Desirable to have knowledge of SOC peripherals like I2C/JTAG/ADC/Timers/USB/ Bus Protocols OCP, AHB, AXI, BVCI
Expertise in RTL coding using Verilog/SystemVerilog
Hands on Experience with C Programming Language
Proficiency in common UNIX scripting languages (Perl, Python, csh, etc.)
Excellent debug skills in both functional and gate level simulations
Knowledge of revision control tools such as CVS, Perforce, DesignSync
Working knowledge of semiconductor device physics, transistor characteristics, and associated layout considerations
Solid Written and Verbal Communication skills
Experience working with cross functional global teams
Clear history of task ownership and proactively addressing issues

Desired Skills:
Experience with Verification Methodologies such as UVM/VMM
Knowledge of Programming Languages such as C++ or System C
Knowledge and exposure to complete SOC RTL to GDS to silicon release flow is desired

Required Education:
BS or MS in Electrical/Electronic Engineering with 6-15 years experience, MSEE preferred.


If You are Interested With the above Position reply back to me ASAP along with Your Updated CV along with following details:

CCTC:
ECTC:
NPRD:
Total Exp:
Relevant Exp:

Thanks and regards,

Sebastian Thomas
Sr Executive IT Recruitment
Impact Management Services
Tel: 080-69001809
Email: sebastian@impsmanagement.com
URL: www.impsmanagement.com

KEY INFORMATION:
Salary: 12,00,000 - 22,00,000 P.A
Industry: Semiconductors / Electronics
Functional area: Other
Role:Other
Role category:Other
Key skills: Soc Design full chip wifi bluetooth
DESIRED CANDIDATE:
Any graudate:B.Tech/B.E. - Electrical, Electronics/Telecommunication
Post graduate:M.Tech - Electrical, Electronics/Telecommunication
Doctrate:Ph.D - Advertising/Mass Communication
Please refer to the Job description above
RECRUITER DESCRIPTION:
Impact HR Services Pvt.Ltd.
A Leading semiconductor company
Impact HR Services Pvt.Ltd.
A Leading semiconductor company ...