Position is for a contract period of 1 year with a monthly salary maximum consolidated 34,000/- for Lab Engineer (on contract).
No of Post: One
Eligibility : A. Basic: Candidates must have basic knowledge on System administration, UNIX language and computer programing. Additional to that candidates must have knowledge in CAD tools (CADENCE, SYNOPSYS, and MENTOR GRAPICS)
1. Minimum of 75% or 8.0/10 CGPA MTECH in Electronics and Communications Eng + lyear's experience in VLSI field
2. Minimum of 75% or 8.0/10 CGPA in Master of computer application (MCA) + 2 year's relevant job experience in VLSI field
3. Minimum of 75% or 8.0/10 CGPA BTECH in Electronics and Communications Eng + 3 year's job experience in VLSI field
Contact: Interested candidates should intimate by email (email@example.com) their willingness to attend interview by at least one day before the date of interview. Please write "EE-jobs/Lab_Engg/SMDP-C2SD Project" in the subject line and attached your recent resume with your passport photo.
Place: Interview will be held from 10:00 AM, 15th February, 2016, Academic Block A, IIT Hyderabad.
For more details : http://www.iith.ac.in/recruitment/pdf%20files/Walk-in%20interview%20for%20the%20post%20of%20Lab%20Engg_3%20feb16.pdf
|Industry:||Education / Teaching / Training|
|Functional area:||IT Software - Embedded , EDA , VL|
|Doctrate:||Any Doctorate - Any Specialization, Doctorate Not Required|
|Please refer to the Job description above|