12,00,000 - 22,00,000 P.A
IC Digital Design (IP Design, ASIC, SOC, RTL,VHDF) (6+yrs) (Bangalore)
Would like to know if you are contemplating for a change at this point of time. Please find the job description below. Kindly go through following specifications.
Kindly send all the details mentioned below along with CV. Which are required to upload your profile. ( MANDATORY )
Expected CTC ?
Notice Period? ( Kindly note : Client is looking for < = 10 15 - 30 DAYS notice period candidates , IMMEDIATE is preferable )
Full Name ?
All education details start from 10th onwards (Board / University / Institute, Year of passing, Percentage Secured)?
Current Location ?
Current Organization ?
Current Designation ?
Total years of experience
On IP Digital Design ( Years )
On ASIC ( Years )
On SoC ( Years )
On RTL Verilog ( Years )
On VHDL Design ( Years )
On System Verilog ( Years )
On CSH Scripting ( Years )
On Perl Scripting ( Years )
KINDLY NOTE : IF YOUR CV SHORTLISTED, FTF INTERVIEW DURING THE WEEKDAY 19th Feb 2016, Friday @ Bangalore , Manyata Tech Park. HOPE ITS OK FOR YOU (YES / NO)
Senior Technical - IC Digital Design
Experience Level 6+ Years
Education : Bachelor Degree or Masters Degree or above in Computer Systems, Embedded systems or Electronics.
Work Location : Bangalore
Ownership of NFC devices digital IPs from specification to RTL implementation
Hands on contributor to IP digital design from scratch and maintenance
Actively participate in IP Architecture definition and feasibility study
Translate Architecture specification in to Micro-Architecture and Implementation specification
Actively drive IP Design, Scalability, Reuse and Automation methodologies in scope of Design
To mentor/support design team members on technical challenges and decision making within IP scope.
Experience in ASIC/ SoC front-end (preferably RTL Verilog and VHDL based) design and methodologies.
Earlier experience with SoC Processor based architectures needed
Self-driven and capable for independent work and independent decision making.
Expert in frontend design experience on IPs involve ARM processor based sub-system, Serial Standard interfaces, Memory controllers
Exposure to Low-power design, System Security considered as added advantage
Hands on front-end design of complex multi clock domain blocks and soft IP delivery methodologies.
Expert in design & verification languages such as VHDL, Verilog, C and System Verilog.
Expert in Spyglass for lint and CDC checks.
Experience in using Cadence RC for synthesis and LEC flow.
Expert in identifying and implementing complex ECO in netlist.
Working knowledge of csh /perl scripting.
Experience in Formal verification Methodology
Knowledge on Verification Methodologies to actively participate in Debug Analysis.
|Salary:|| 12,00,000 - 22,00,000 P.A |
|Industry:|| IT-Hardware & Networking |
|Functional area:|| IT Software - Embedded , EDA , VL|
|Role:||Team Lead/Technical Lead|
|Role category:||Programming & Design|
|Key skills:|| C System Verilog ASIC VHDL RTL Digital Design Cadence Perl SOC Design Verification IC IP IP Digital IC Digital |
|Any graudate:||Any Graduate - Any Specialization, Graduation Not Required|
|Post graduate:||Any Postgraduate - Any Specialization, Post Graduation Not Required|
|Doctrate:||Any Doctorate - Any Specialization, Doctorate Not Required|
| Please refer to the Job description above |
New Era India Consultancy Pvt. Ltd.
The electronics industry is being driven by four mega trends that are helping shape our society: Energy Efficiency, Connected Devices, Security and Health. Connecting to these trends and enabling Secure Connections for a Smarter World, NASDAQ listed creates solutions that enable Secure Connections for a Smarter World. Building on its expertise in High Performance Mixed Signal electronics. Is driving innovation in the application areas Connected Car, Security, Portable & Wearable and Internet of Things. Has operations in more than 25 countries, and posted revenue of $5.65 billion in 2014.
Headquarters - Netherlands